Why error correction sits at the centre of the Ireland Quantum 100 design
A 100-qubit superconducting transmon processor is not a useful machine on its own. Single-qubit gate errors on current best-in-class transmons sit in the 1e-4 to 1e-3 range; two-qubit gate errors are typically an order of magnitude worse, somewhere between 3e-3 and 1e-2 depending on coupler design, calibration drift and crosstalk. Measurement errors add another 1e-2. Stack those across a circuit of any meaningful depth and the output is noise. Useful chemistry — the carbon-capture and battery-materials workloads we are scoping — needs circuit depths well beyond what any noisy intermediate-scale device executes faithfully. Quantum error correction is the only known route across that gap, and the surface code is the route we are building toward.
This page sets out the engineering position behind the surface-code roadmap for Ireland Quantum 100, the logical-qubit timeline we are committing to internally, and the assumptions underneath. It is deliberately specific. If something is uncertain, it is flagged as uncertain.
The surface code, in the form we will run it
The surface code is a topological stabiliser code defined on a 2D lattice of physical qubits. Data qubits hold the encoded state; ancilla qubits, interleaved on the lattice, are repeatedly measured to extract X-type and Z-type stabiliser syndromes without collapsing the logical state. A code of distance d requires roughly 2d² − 1 physical qubits per logical qubit and can correct up to (d−1)/2 errors per round. Logical error rate falls exponentially with d provided the physical error rate is below the code's threshold — typically quoted around 1% per gate for the surface code under a standard circuit-level depolarising model.
For Ireland Quantum 100 we are targeting a heavy-hex-derived layout that maps cleanly onto a rotated surface code patch. Heavy-hex reduces frequency-collision and crosstalk problems versus a square lattice at the cost of more SWAP overhead in some circuits — a trade we accept because syndrome extraction dominates the duty cycle once we move into the encoded regime. The native two-qubit gate is a tunable-coupler CZ, with cross-resonance retained as a fallback. Mid-circuit measurement is non-negotiable; the resonator readout chain has to clear inside roughly 500 ns with fidelity high enough that the syndrome stream is decodable in real time.
From 100 physical qubits to one good logical qubit
One hundred physical transmons does not give us a fault-tolerant computer. It gives us, realistically, a single distance-7 surface-code patch (97 physical qubits including ancillas) or, more conservatively, a distance-5 patch (49 physical qubits) with headroom for lattice surgery experiments and a separate calibration patch. That is the honest framing.
The logical-qubit progression we are planning runs:
- Distance-3 patch (17 qubits) — first encoded logical qubit. Goal: demonstrate that increasing
dfrom 3 to 5 reduces logical error per round. Without that crossover, nothing else in the roadmap matters. - Distance-5 patch (49 qubits) — first logical qubit where logical error per round is meaningfully below the best physical two-qubit error rate on the same chip.
- Distance-7 patch (97 qubits) — full-chip single-logical-qubit operation, used for memory experiments and as the substrate for early lattice-surgery primitives once a second device is online.
This is one logical qubit. Logical algorithms — Trotterised Hamiltonian simulation for catalyst chemistry, for example — need tens to hundreds of logical qubits, plus a magic-state factory for non-Clifford T gates. Ireland Quantum 100 is the calibration and decoder vehicle for the next machine, not the final scientific instrument. We are saying that out loud because the field has not always been honest about it.
Decoders, latency, and the real-time problem
A surface code is only as good as the decoder behind it. The decoder consumes the syndrome stream and infers, in real time, the most likely error chain. For Ireland Quantum 100 the decoding stack we are committing to is layered:
- Minimum-weight perfect matching (MWPM) using a PyMatching-class implementation as the reference decoder. Well-understood, accurate enough at the distances we care about, useful as ground truth.
- Union-find decoder on FPGA for the real-time path. Near-linear time complexity, fits inside the syndrome-cycle budget — we are budgeting under
1 µsend-to-end for distance-5, which is tight but achievable with current FPGA fabrics. - Neural-network decoders as a research track, primarily to handle correlated and leakage errors that MWPM mishandles. Not on the critical path for first-light.
Decoder latency is what kills you. If decoding falls behind syndrome extraction, the syndrome buffer grows without bound and the logical qubit decoheres before correction is applied. The control-system design — Quantum Machines-class OPX hardware in our current architecture — has to close that loop deterministically. This is where most of the unglamorous engineering lives.
Timeline: when each milestone lands
The honest, committed sequence for quantum error correction Ireland-side:
- Q3 2026 — site fit-out at the Tipperary facility. Vibration isolation, magnetic shielding, RF environment characterisation. No qubits yet; the room has to be quiet first.
- Q4 2026 — cryostat install and cooldown to sub-15 mK. Wiring qualification, attenuator chain, TWPA integration on the readout lines.
- Q1 2027 — first-light single-qubit operation. Randomised benchmarking,
T1/T2characterisation, single-shot readout fidelity baseline. No error correction yet. - Q2 2027 — multi-qubit operation, two-qubit gate calibration across the lattice, first customer access on the noisy-intermediate-scale device. Repetition-code experiments begin here as a stepping-stone to the surface code.
- H2 2027 onward
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